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Graphics processing unit
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#	Item
41	Formalising GPU memory models John Wickerson 1 / Tyler Sorensen 2,3 / Daniel Poetzl 2,4 / Mark Batty 5 / Jade Alglave 2 / Alastair Donaldson 1 1 Imperial College London / 2 University College London / 3 University of Uta Add to Reading List Source URL: carp.doc.ic.ac.uk Language: English - Date: 2014-01-20 09:48:39 Computing Concurrent computing Parallel computing GPGPU Computer architecture Graphics hardware Video cards OpenCL CUDA Graphics processing unit Thread General-purpose computing on graphics processing units
42	The Oxygen GVX210 Graphics Accelerator User’s Guide TM 3Dlabs,® Inc. Add to Reading List Source URL: www.3dlabs.com Language: English - Date: 2002-07-31 10:43:00 Computing Computer architecture Graphics libraries 3Dlabs Virtual reality Cross-platform software OpenGL Accelerated Graphics Port Direct3D Windows NT 4.0 Graphics processing unit Silicon Graphics
43	PLACES 2012 Programming Language Approaches to Communication- and Concurrency-cEntric Software (5th International Workshop) An ETAPS Satellite Event Add to Reading List Source URL: places12.di.fc.ul.pt Language: English - Date: 2012-03-27 06:34:08 Computing Concurrent computing Parallel computing Computer architecture GPGPU Graphics hardware Video cards Application programming interfaces OpenCL General-purpose computing on graphics processing units Multi-core processor Graphics processing unit
44	NESUS IC1305 Network for Sustainable Ultrascale Computing Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2015-02-23 04:02:57 Computing Parallel computing Computer architecture GPGPU Graphics hardware High-definition television Video compression General-purpose computing on graphics processing units Graphics processing unit Multi-core processor Tegra Fermi
45	Dynamically scheduled Cholesky factorization on multicore architectures with GPU accelerators. Emmanuel Agullo, C´edric Augonnet, Jack Dongarra, Hatem Ltaief, Raymond Namyst, Jean Roman, Samuel Thibault, Stanimire Tomov Add to Reading List Source URL: hal.inria.fr Language: English - Date: 2016-06-16 06:44:46 Computing Numerical linear algebra Parallel computing Numerical analysis Computer architecture GPGPU Numerical software Graphics hardware Graphics processing unit Cholesky decomposition Basic Linear Algebra Subprograms LAPACK
46	GPU Acceleration for Machine Learning John Canny^ Computer Science Division University of California, Berkeley ^ Google Research, 2016 Add to Reading List Source URL: matroid.com Language: English - Date: 2016-08-06 02:51:37 GPGPU Computing Concurrent computing Computer architecture Parallel computing Graphics hardware Video cards Graphics processing unit Compute kernel CUDA FLOPS
47	User Guide TexturePerformancePBO Demo The TexturePerformancePBO Demo serves two purposes: 1. It allows developers to experiment with various combinations of texture transfer methods for texture upload (to the GPU) and re Add to Reading List Source URL: developer.download.nvidia.com Language: English - Date: 2008-04-18 21:37:23 Computing Computer graphics Software development Virtual reality Graphics hardware Video game development Graphics libraries OpenGL Texture mapping Graphics processing unit Shader RGBA color space
48	GPUDirect RDMA over 40Gbps Ethernet High Performance CUDA Clustering with Chelsio’s T5 ASIC Executive Summary NVIDIA’s GPUDirect technology enables direct access to a Graphics Processing Unit (GPU) over the PCI bus, Add to Reading List Source URL: www.chelsio.com Language: English - Date: 2015-07-02 01:06:04 Computing Supercomputers Ethernet Computer networks SCSI Computer memory Remote direct memory access IWARP InfiniBand Hyper-V Chelsio Communications Network interface controller
49	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, VOL. 26, NO. 3, MARCHAdaptive Scheduling Framework for Real-Time Video Encoding on Heterogeneous Systems Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2016-03-04 03:49:16 Computer architecture Computing ARM architecture Computer engineering Graphics hardware System on a chip GPGPU Nvidia Tegra Raspberry Pi Graphics processing unit MVS
50	Multi-Layer Packet Classification with Graphics Processing Units Matteo Varvello†∗, Rafael Laufer , Feixiong Zhang2 , T.V. Lakshman † Telefonica Research, Add to Reading List Source URL: conferences2.sigcomm.org Language: English - Date: 2014-12-01 16:55:52 Computing Computer architecture Concurrent computing Parallel computing GPGPU Graphics hardware Video cards Graphics processing unit Thread Tuple Compute kernel Firewall